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ℹ️ Information
ℹ️ Information
- 🌐 About this website
- 🔰 Guidance for new student (AY 2026)
- 🔰 Checklist for new student orientation meeting
  🔰 Checklist for new student orientation meeting
- 🚂 Training for new members
  🚂 Training for new members
- 🔬 Server/Page Info
  🔬 Server/Page Info
- 📑 Paper submission
  📑 Paper submission
- 🎓 Graduation Thesis
  🎓 Graduation Thesis
  - Preparation
  - After the presentation
👨‍🏫 Invited Talks
👨‍🏫 Invited Talks
📅 Meetings
📅 Meetings
🗂️ Tutorial
🗂️ Tutorial
- List of tutorials
- 🛠 HW Design
  🛠 HW Design
  - Verilog/SystemVerilog/VHDL tutorial
    Verilog/SystemVerilog/VHDL tutorial
    
    Intro
    
    Combinational Logic
    
    Sequential Logic
    
    Reset and Clock
    
    Naming
    
    RTL template
    
    Testbench template
    
    Useful website
    Useful website
    
    Asic-world
    
    Stitt-hub
    
    RTL-Training Repo
  - Simulate with Modelsim
    Simulate with Modelsim
    
    Introduction
    
    Clone the project
    
    Source the env variables
    
    Write your Verilog code
    
    Open Modelsim
    
    Use command line
    
    Code Coverage
    
    Write a script
    
    Learn More!
  - ASIC
    ASIC
    
    Basic
    Basic
    
    Getting started
    
    Writing Verilog
    
    RTL Simulation
    
    Synthesis (Synopsys DC)
    
    Place and Route
    
    Mini Ex
    
    Advanced
    Advanced
    
    Getting started
    
    Explore the library
    
    Post-synthesis simulation
    
    Post-synthesis simulation with timing
    
    Post-place-and-route sim
    
    Macro
    
    Through-Silicon-Via (TSV)
    
    OpenRAM
    
    Power estimation
    
    Clock-gating
    
    Temperature simulation
    
    Design: 🕸️ Network-on-Chip
    Design: 🕸️ Network-on-Chip
    
    Getting started
    
    Simulation
    
    SNN Simulation
    
    Synthesis
    
    Post-synthesis Simulation
    
    Place and Route
    
    Power estimation
    
    Sample projects
  - FPGA
    FPGA
    
    Basic
    Basic
    
    0. Installation
    
    Standalone RTL design
    Standalone RTL design
    
    1. Create a project
    
    2. Run the project on FPGA
    
    3. Understand the reports
    
    Simple SoC
    Simple SoC
    
    1. Create a project
    
    2. Port to SDK
    
    3. Run the program in the FPGA
    
    Custom IP
    Custom IP
    
    Introduction + Materials
    
    General Instruction
    
    Lab-1
    
    Lab-2
    
    Lab-3
    
    Lab-4
    
    Lab-5
    
    Sample Projects
    Sample Projects
    
    SNN on Basys 3
    
    SNN on Arty 7
    
    LIF neuron on MicroZed
- 🤖 Machine Learning
  🤖 Machine Learning
  - Getting started
  - General Machine Learning
    General Machine Learning
    
    Getting started
    
    Installation
    
    Dataset
    
    Notable techniques and Recommendation
  - Artificial Neural Network
  - Spiking Neural Network
    Spiking Neural Network
    
    Introduction
    
    Neurons
    
    Neurons
    
    Neuron
    
    Izhikevich
    
    SNNTorch
    SNNTorch
    
    Official tutorial
    
    Bindsnet
    Bindsnet
    
    STDP learning
    
    Spiking Jelly
    Spiking Jelly
    
    1.1 Time-step
    
    1.2 Using neuron
    
    1.3 Input size and net reset
    
    3.1 Revisit LIF neuron
    
    3.2 Revisit LIF neuron part 2
    
    3.3 Design your neuron
- Accessing servers
  Accessing servers
- 🎯 Optimization
  🎯 Optimization
  - Getting started
  - Single Objective
    Single Objective
    
    0-1 Knapsack
  - Multiple Objectives
    Multiple Objectives
    
    0-1 Knapsack
    
    MOO minicourse
- Makefile
  Makefile
- Git
  Git
  - Intro
  - Basic
  - Advanced
  - Branch
- Markdown
  Markdown
  - Intro
  - Basic
  - Advanced
♾️ Member
🎗️ Management
🎗️ Management
- 🔒 Password Protected 🔒 Password Protected
  Table of contents
- 🖥️ Devices
- 🪑 Desk
- 📚 Books
- 🌐 Website
- 🖥 Server: how-to
- ⚗️ Materials
  ⚗️ Materials
- 🈸 University Docs
  🈸 University Docs
⚔️ Activities
⚔️ Activities
- Awards
- Contests
  Contests
  - All Contests
  - IEEE CAS Society Design Contest
    
    IEEE CAS Society Design Contest
  - LSI Contest
    
    LSI Contest
🌐 Links
🌐 Links
- 📝 The Thinking Circuit
- 🚧 Project
  🚧 Project
- 🌐 Useful link
- ↗️ Github
- ▶️ YouTube
📩 Contact

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WXteoeGyeadk2UC4XtjogA==;KHTxgY+AvaRsoYGl3izMuuneSBjO5L01slxlXpEfhDQzJ8lR0hgHrikwp/07wiqrGfQgPMuGTJ27Ops+qGKhXGas18ex1/9kTR7gN1Gw+f8kWHJOrgrFCpV96j5RM23IgiEnpDbS7cL+23D/o4vsZM/hVCb6wkHebe6Vg6HJIL59EpTkDHLxVBhs4ZbTP5yf4niZRcb1WSMrqH1JaGFRWhf3O2mFAs7VrJaf0YypT02EFINwNsUcWLzUbD1b/pSZW20meGAMq3nDFzP7zuwFrOFk7df8P0DlqrxvPBhpLUfkwx5IqfbpO2aL1bPKWNec8UP4zf1lCUqauB9aXcorSXsgtUE4chW2v69bYI/vEed+3OwkoxC9EgRWvtzCG70XlE/v7bvZvkXwF5fTy5v3SWPol6JpgdubK8r4aLNIrXQVNNCbtsZS6tVxhS9Uk7r88qRqfvY6UYShdquj7tAEwTkXSA+sTOU0eQI2QR2Us80c+BaURydsIahd0mZKT8AoBzR0OHCM0dr30VGWJs5QdGXgYkw7xxsRBblQ6sh5zYiZnezCCSsHzujKnmgCSvfBm8eYJBatZ3EL9fF57aT+KpmkOVcpmqzYC/VwBKGr7VcUu3h1gx4Tuyq7XmDNnvgg7Ik/oy7pjgxXFPrcLhdsJ0iTL4ULAt6GVI73QeMH5yIzsQDP7szZ2StIn2mo09fMHSFU2DIIHtmmyed9WD0/SOwuvUU/pfrsVSYLCfEAtJog3nkhQAk4Et6sJT9rLCQS1ok/Fd0EgEEbTFFUyWOLV3vyhZh06wfaVLHOLIZHpLwqNr6r9C0cm0yWzxBJdI0/85CUKuH1aC3bBu+V9rNgpvF5J7SfVUDGHubKo5sHuDzLlPMTB/7NGrwEC7g31qPGBlR0jDgo5mKvWmRhpRdeUVnSlCWZwoZiBcEGGPwksajU/aGxmA7XG7tMtJoanNQ7FN+xKkwhFxhROJSIYs/SZvU3/pVoWy5W7IglNMyy+p8alar7z/wGLvcflzhgSE4fCHPI8couti1B5wbvdvBTD37J5vZ6Cn8aNdiXTxYTKoIEJjEkpVc6VGHO6jwPfYHPxaqlmPIDjxw9s0ZNYq/VYo1CsTc5wx1G0+lyXq3WvsgZ7adGufR+9OlE/D80xq9zae+88Pp338ijJEHhmqGzMH+pu/317J5eAP4IxdfkdBGfnVgo8z3MBZ/QOyKsHDTcO8wcFff+UeY/i2DotM6bXR3D+9k3AtkqmxGV4RvecWIdGrM4oyae1i5pGgIp94MgYXhI/8asFQiKx021XRl7nSuwlgV1/HGjLRlh+yULiH56IFWuyAE/MCJVvvnQQ70nrNtzqaV8ocA5f/rivwuQdYy2eyBDbntFjlqV1sLrNzRxJgt830AsW0CrsrZAhn0U9NVIxVKNpGqCbb6Y93UMzjpB2MI/UxZqLEpVsfkVz3zp2BFlW4xpthXsrGgCql6LybBFiBxQ/BA4OEzwf8ZYxOFxoyB+ZsJx3AatMkUWWGVQgpaVb79ZOOQtR40vgf9CszF/mRXyheZXCUpJLuZZDzypLXNBP5DjiUCffrtxUMfTbOQd9hWOHq1ndLFm9MRZbhodxbw4uDtPi4OKbpMDsy4S02AozvpfT9VoZc0qFMLg+AG9NbmB1ls/0wp0h0S3vuh+Uqk+0ybyCrZ1nedEBoUqwEaLW5SJSF+9pw8KQNU=

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