E3Computing's Docs

Introduction

👾 E3Computing HP
🏠 Docs
ℹ️ Information
ℹ️ Information
- 🌐 About this website
- 🔰 Guidance for new student (AY 2026)
- 🔰 Checklist for new student orientation meeting
  🔰 Checklist for new student orientation meeting
- 🚂 Training for new members
  🚂 Training for new members
- 🔬 Server/Page Info
  🔬 Server/Page Info
- 📑 Paper submission
  📑 Paper submission
- 🎓 Graduation Thesis
  🎓 Graduation Thesis
  - Preparation
  - After the presentation
👨‍🏫 Invited Talks
👨‍🏫 Invited Talks
📅 Meetings
📅 Meetings
🗂️ Tutorial
🗂️ Tutorial
- List of tutorials
- 🛠 HW Design
  🛠 HW Design
  - Verilog/SystemVerilog/VHDL tutorial
    Verilog/SystemVerilog/VHDL tutorial
    
    Intro
    
    Combinational Logic
    
    Sequential Logic
    
    Reset and Clock
    
    Naming
    
    RTL template
    
    Testbench template
    
    Useful website
    Useful website
    
    Asic-world
    
    Stitt-hub
    
    RTL-Training Repo
  - Simulate with Modelsim
    Simulate with Modelsim
    
    Introduction
    
    Clone the project
    
    Source the env variables
    
    Write your Verilog code
    
    Open Modelsim
    
    Use command line
    
    Code Coverage
    
    Write a script
    
    Learn More!
  - ASIC
    ASIC
    
    Basic
    Basic
    
    Getting started
    
    Writing Verilog
    
    RTL Simulation
    
    Synthesis (Synopsys DC)
    
    Place and Route
    
    Mini Ex
    
    Advanced
    Advanced
    
    Getting started
    
    Explore the library
    
    Post-synthesis simulation
    
    Post-synthesis simulation with timing
    
    Post-place-and-route sim
    
    Macro
    
    Through-Silicon-Via (TSV)
    
    OpenRAM
    
    Power estimation
    
    Clock-gating
    
    Temperature simulation
    
    Design: 🕸️ Network-on-Chip
    Design: 🕸️ Network-on-Chip
    
    Getting started
    
    Simulation
    
    SNN Simulation
    
    Synthesis
    
    Post-synthesis Simulation
    
    Place and Route
    
    Power estimation
    
    Sample projects
  - FPGA
    FPGA
    
    Basic
    Basic
    
    0. Installation
    
    Standalone RTL design
    Standalone RTL design
    
    1. Create a project
    
    2. Run the project on FPGA
    
    3. Understand the reports
    
    Simple SoC
    Simple SoC
    
    1. Create a project
    
    2. Port to SDK
    
    3. Run the program in the FPGA
    
    Custom IP
    Custom IP
    
    Introduction + Materials
    
    General Instruction
    
    Lab-1
    
    Lab-2
    
    Lab-3
    
    Lab-4
    
    Lab-5
    
    Sample Projects
    Sample Projects
    
    SNN on Basys 3
    
    SNN on Arty 7
    
    LIF neuron on MicroZed
- 🤖 Machine Learning
  🤖 Machine Learning
  - Getting started
  - General Machine Learning
    General Machine Learning
    
    Getting started
    
    Installation
    
    Dataset
    
    Notable techniques and Recommendation
  - Artificial Neural Network
  - Spiking Neural Network
    Spiking Neural Network
    
    Introduction
    
    Neurons
    
    Neurons
    
    Neuron
    
    Izhikevich
    
    SNNTorch
    SNNTorch
    
    Official tutorial
    
    Bindsnet
    Bindsnet
    
    STDP learning
    
    Spiking Jelly
    Spiking Jelly
    
    1.1 Time-step
    
    1.2 Using neuron
    
    1.3 Input size and net reset
    
    3.1 Revisit LIF neuron
    
    3.2 Revisit LIF neuron part 2
    
    3.3 Design your neuron
- Accessing servers
  Accessing servers
- 🎯 Optimization
  🎯 Optimization
  - Getting started
  - Single Objective
    Single Objective
    
    0-1 Knapsack
  - Multiple Objectives
    Multiple Objectives
    
    0-1 Knapsack
    
    MOO minicourse
- Makefile
  Makefile
- Git
  Git
  - Intro
  - Basic
  - Advanced
  - Branch
- Markdown
  Markdown
  - Intro
  - Basic
  - Advanced
♾️ Member
🎗️ Management
🎗️ Management
- 🔒 Password Protected
- 🖥️ Devices
- 🪑 Desk
- 📚 Books
- 🌐 Website
- 🖥 Server: how-to
- ⚗️ Materials
  ⚗️ Materials
- 🈸 University Docs
  🈸 University Docs
⚔️ Activities
⚔️ Activities
- Awards
- Contests
  Contests
  - All Contests
  - IEEE CAS Society Design Contest
    
    IEEE CAS Society Design Contest
  - LSI Contest
    
    LSI Contest
🌐 Links
🌐 Links
- 📝 The Thinking Circuit
- 🚧 Project
  🚧 Project
- 🌐 Useful link
- ↗️ Github
- ▶️ YouTube
📩 Contact

🏠 Docs
🗂️ Tutorial
🛠 HW Design
Simulate with Modelsim

C53sfurgnOKSvV7he7erjg==;v9FEx9qt6DUuz3pBpNSGiLhEb8LZzxKOLpmQPeYSiAh/2GgAkZCtOso4pVVSN1KFLtWXZkxn49zoxEhrOgx4pjbb8wdZb5+N7/pZQaBq3StL5g6gv4Kb/18whpT+1VX8n0Jzsfx5Qfr6oTkqM43TZmE088zJlhl83Qs1GLuMvAOPe42tdcp6TtF50WB3WHa9V2cEzeoTQiZmkaOQNgSY5Ph6oLVN1SFSrFruRymBqpFuflUJxoErI1JyCAsScO6765mCGnMLjbex6G3Jj7cG5Ou6/PsJJR51Ksahedgo8cw9zAM8oi2TwaMwPl7UMzNREGEmKjA2D6zwIKNwn3iKeoJDxYNdsLa1p/L4Uks4D+/gEJl24W+U9xBCZ75HFP/hbR3m/VxXfR6x6MnjfXjRHhTgw7Q3nq5cb7LHgFmeMmGAr0WDoq7gczTn4LaSl9HKISCRp2s+er5u7J+XS4WtCZR5gzrUuoCu75U5LUisrEi3Vq/wh4QNm2IRVYDa5bAelHWyIp3rwwKaPfRjD4jvnMuvNJxF9WxNsOv+8J+F4jRav/6vviUXqwHAOCGXX0+tVfwUFGsN4fmgzy12QzvoVya/n/+1XSklerK+f8OPw9M6RIS1bZFEdHLif4MZG7Zz5nH/aKw06Go9l3MiEvKl5SQBH+ICBbHjsr2bQD9ysvXxFMC5sh4L8vaQe63ejEGOQDEPf3GtyCimwKH3l8IF5K1Y8ChaLfumLKoZjVQ5uyVJ4w+G5wk4Fb8xtMiOPvj9+T1yjwxPKXCk40Yaem0o/1/nsaKC31YwtwO4iKG4KW+mnKV0TjaAsvTn1HyC1P/ohJY6fm14IJkbZoJIuaZz1ea55pAPmuQnLjJGDKhTMbGXihdzGQOoVtTYRC7bxOMhbUgkfxFQuhIOat9UylVxXCHVI4VqKeCELfVMK8Mptdtcfuzy/+G2jr8uH9jM8MKxQ6AV8tzTd+gqVk2FTlVQlAzy/JZEUxcmXoslIdh0e60hxPrNOpGwotaEcE2FLveLvMtnxzVEXLpYkeal0d+sxWMDOaJdZOVuHnxcW37HpEjeZxm7LkqKEb9FvsylH5t9FzDYeOlHc2w99j1lhmTYO9w5viTSaXCTPzwvuZOdetZ5DHlkYc1v50JuSICby2ZgaosycJW+Z0ppta0wtaX0sJ9TzpiOu38Q6ZF8m6gOSTcnbxiL7sWy4k6GwyuFQc32uQN7t1L+3TJUHLSjT3OxSspzlH3mg2CYJH8L5XrS7xSE1zX6L3kfN9n0fCwtNANQBaS4/sbEvchbJr7KEqXXBb0wB4+hu0easxzNYTs1cbKJiZlvaOi5bgeJ1bsS6DsBcYOImTZicz3gBboEU/OKKlIuSoJsdOvWQlvu2Kj5qMZelIMYTHfgkprlZT2qt5DuPX6XT/nI2iNLYu007Zr2NY+PoWJiYEp+cCMpmmVncbe598oX6U7kab1AAive5M3UuvxXqyqkm6X9N880/rRdrn/UEyIZgipgRcMiWjpWV3fo36teP7Q9w7foX7HOmkA6J4LdSz7Fok61Qe2gVGA76Ktm9bo64byEEeS3JKPE9mNHHS3ySvGjHTKuZ59tsdBUrURJYw3nbiSmSnZYzzvX4k0JN8UaJHnRSZeGoW2JpE2QTWFVXYhAccvdnB4xBqMGDOfukc60TFpx7qo7Nk5i+YJlWWkYLNUbyHWCoxk8gpFxK86Cgu9qBoQGTetRb/sj5O3FfVwaE0IXCGNBwulDoA==

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